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AMD - Adaptable Learning

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Design Process

	AI Engine Development
	Board System Design
	Embedded Software Development
	Hardware IP & Platform Development
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	Machine Learning and Data Science
	System and Solution Planning
	System Integration and Validation

Silicon

	7 series
	Alveo
	Kria
	MPSoC
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	RFSoC
	UltraScale/UltraScale+
	Versal
	Zynq

Tools

	DNNDK
	Dynamic Function eXchange
	HLS
	IP Integrator
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	ISE
	ML Suite
	Model Composer
	Partial Reconfiguration
	PetaLinux
	SDAccel
	SDSoC
	SysGen
	UFDM
	Vitis
	Vitis AI
	Vitis IDE
	Vivado
	Xilinx SDK

Technology

	AWS
	DSP
	Embedded
	Functional Safety & Security
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	Machine Learning
	PCB
	PCIE
	Power & Thermal
	SLD

Delivery Type

	OnDemand
	Live Classroom
	Virtual Classroom

Language

English

Market

	A&D
	Auto
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	Competitive
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	Data Center
	ISM
	TME
	Wired & Wireless

Free Course

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Adaptive SoCs for System Architects

This course provides system architects with an overview of the capabilities and support for the AMD Zynq™ UltraScale+™ MPSoC and Versal™ adaptive SoC devices.The emphasis is on:Utilizing power management strategies ef...

Designing with the IP Integrator Tool

Explore the Vivado™ IP integrator tool and its features to gain the expertise needed to develop, implement, and debug different IP integrator block designs using the Vivado Design Suite.This course focuses on:Creating...

Designing with the Versal Adaptive SoC: Architecture

Learn about the AMD Versal™ adaptive SoC architecture building blocks, such as the programmable logic, high-speed I/O, clocking, processing system, AI Engines, and the programmable network on chip (NoC). Also learn ho...

Designing with the Versal Adaptive SoC: Design Methodology

Use different AMD Versal™ adaptive SoC design methodologies and techniques for developing designs targeting Versal devices. Also learn how to apply application mapping and partitioning, design closure, power, and ther...

Designing with the Versal Adaptive SoC: Hardware Debug

This course describes the tools and techniques available to debug AMD Versal™ devices. You will learn about features for debugging the fabric (programmable logic) and the hard blocks. The course also covers ChipScoPy ...

Designing with the Versal Adaptive SoC: Network on Chip

This course introduces the AMD Versal™ network on chip (NoC) to users familiar with other SoC architectures. Besides providing an overview of the major components in the Versal device, the course illustrates how the N...

Designing with the Versal Adaptive SoC: Quick Start

Explore the AMD Versal™ adaptive SoC heterogeneous architecture containing a programmable network on chip (NoC) and AI Engines and learn how to use different design tool flows targeting Versal devices. Gain knowledge ...

Designing with the Versal AI Edge Series Gen 2 and Prime Series Gen 2: Architecture

Learn about the AMD Versal™ AI Edge Series Gen 2 and Prime Series Gen 2 adaptive SoC architectures, which combine programmable logic with a new high-performance processing system and next-generation AI Engines. Also l...

Designing with the Zynq UltraScale+ RFSoC

This course provides an overview of the hard block capabilities for the AMD Zynq™ UltraScale+™ RFSoC family with a special emphasis on the RF Data Converter and Soft-Decision FEC blocks.The focus is on:Describing the ...

Designing with Versal AI Engine: Architecture and Design Flow - 1

This course describes the AMD Versal™ AI Engine architecture, the data communications within an AI Engine array and between the PL and AI Engines, how to program the AI Engines (single kernel programming and multiple ...

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