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AMD - Adaptable Learning

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Design Process

	AI Engine Development
	Board System Design
	Embedded Software Development
	Hardware IP & Platform Development
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	Machine Learning and Data Science
	System and Solution Planning
	System Integration and Validation

Silicon

	7 series
	Alveo
	Kria
	MPSoC
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	RFSoC
	UltraScale/UltraScale+
	Versal
	Zynq

Tools

	DNNDK
	Dynamic Function eXchange
	HLS
	IP Integrator
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	ISE
	ML Suite
	Model Composer
	Partial Reconfiguration
	PetaLinux
	SDAccel
	SDSoC
	SysGen
	UFDM
	Vitis
	Vitis AI
	Vitis IDE
	Vivado
	Xilinx SDK

Technology

	AWS
	DSP
	Embedded
	Functional Safety & Security
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	Machine Learning
	PCB
	PCIE
	Power & Thermal
	SLD

Delivery Type

	OnDemand
	Live Classroom
	Virtual Classroom

Language

English

Market

	A&D
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	Competitive
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	Data Center
	ISM
	TME
	Wired & Wireless

Free Course

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Design Closure Techniques

Learn how to achieve design closure more efficiently and productively by using the three pillars of design closure (functional closure, timing closure, and power closure). Also learn how to solve functional behavior, ...

Designing with the Versal Adaptive SoC: Design Methodology

Use different AMD Versal™ adaptive SoC design methodologies and techniques for developing designs targeting Versal devices. Also learn how to apply application mapping and partitioning, design closure, power, and ther...

Designing with the Versal Adaptive SoC: Memory Interfaces

This course provides a system-level understanding of AMD Versal™ adaptive SoC memory interfaces. Memory controller architecture, IP generation, simulation, and implementation are covered. Additional information on PCB...

Designing with the Versal Adaptive SoC: Power and Board Design

This course provides a system-level understanding of power and thermal issues related to designing with the AMD Versal™ adaptive SoC. PCB design considerations for the Versal devices are also covered.The emphasis of t...

Designing with the Versal Adaptive SoC: Serial Transceivers

This course provides a system-level understanding of AMD Versal™ adaptive SoC serial transceivers. Transceiver architecture, IP generation, simulation, and implementation are covered. Additional information on PCB des...

Designing with the Zynq UltraScale+ RFSoC

This course provides an overview of the hard block capabilities for the AMD Zynq™ UltraScale+™ RFSoC family with a special emphasis on the RF Data Converter and Soft-Decision FEC blocks.The focus is on:Describing the ...

DFX - Designing with Dynamic Function eXchange Using the Vivado Design Suite

Learn how to construct, implement, and download a Dynamic Function eXchange (DFX) design using the Vivado™ Design Suite. This course covers both the tool flow and mechanics of successfully creating a DFX design.The em...

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