The riscv-port-dev March 2022 Archive by thread

March 2022 Archives by thread

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Starting: Tue Mar 1 01:42:12 UTC 2022
Ending: Thu Mar 31 09:52:00 UTC 2022
Messages: 55

• [riscv-port] RFR: 8281967: riscv: Intrinsify bigIntegerLeftShift [v2]   Taiping Guo
  • [riscv-port] RFR: 8281967: riscv: Intrinsify bigIntegerLeftShift [v2]   Taiping Guo
• [riscv-port] RFR: 8281967: riscv: Intrinsify bigIntegerLeftShift [v3]   Taiping Guo
  • [riscv-port] RFR: 8281967: riscv: Intrinsify bigIntegerLeftShift [v3]   Fei Yang
    • [riscv-port] RFR: 8281967: riscv: Intrinsify bigIntegerLeftShift [v3]   Taiping Guo
  • [riscv-port] RFR: 8281967: riscv: Intrinsify bigIntegerLeftShift [v3]   Yanhong Zhu
• [riscv-port] RFR: 8282466: riscv: Remove unused code in linux_riscv   Feilong Jiang
  • [riscv-port] RFR: 8282466: riscv: Remove unused code in linux_riscv   Yanhong Zhu
  • [riscv-port] RFR: 8282466: riscv: Remove unused code in linux_riscv   Fei Yang
  • [riscv-port] Integrated: 8282466: riscv: Remove unused code in linux_riscv   Feilong Jiang
• [riscv-port] RFR: 8281967: riscv: Intrinsify bigIntegerLeftShift [v4]   Taiping Guo
  • [riscv-port] RFR: 8281967: riscv: Intrinsify bigIntegerLeftShift [v4]   Fei Yang
• [riscv-port] Integrated: 8281967: riscv: Intrinsify bigIntegerLeftShift   Taiping Guo
• [riscv-port] RFR: 8282328: riscv: Intrinsify bigIntegerRightShift   Taiping Guo
  • [riscv-port] RFR: 8282328: riscv: Intrinsify bigIntegerRightShift   Yanhong Zhu
  • [riscv-port] RFR: 8282328: riscv: Intrinsify bigIntegerRightShift   Fei Yang
  • [riscv-port] Integrated: 8282328: riscv: Intrinsify bigIntegerRightShift   Taiping Guo
• git: openjdk/riscv-port: riscv-port: 38 new changesets   duke
• [riscv-port] RFR: 8282436: riscv: pd_disjoint_words_atomic() needs to be atomic   Taiping Guo
  • [riscv-port] RFR: 8282436: riscv: pd_disjoint_words_atomic() needs to be atomic   Fei Yang
  • [riscv-port] RFR: 8282436: riscv: pd_disjoint_words_atomic() needs to be atomic   Yanhong Zhu
  • [riscv-port] Integrated: 8282436: riscv: pd_disjoint_words_atomic() needs to be atomic   Taiping Guo
• git: openjdk/riscv-port: riscv-port: 13 new changesets   duke
• git: openjdk/riscv-port: riscv-port: 33 new changesets   duke
• [riscv-port] RFR: 8281632: riscv: Improve interpreter stack banging [v4]   Aleksey Shipilev
  • [riscv-port] RFR: 8281632: riscv: Improve interpreter stack banging [v4]   Aleksey Shipilev
    • [riscv-port] RFR: 8281632: riscv: Improve interpreter stack banging [v4]   Fei Yang
• git: openjdk/riscv-port: riscv-port: 16 new changesets   duke
  • git: openjdk/riscv-port: riscv-port: 16 new changesets   duke
• [riscv-port] RFR: 8281632: riscv: Improve interpreter stack banging [v5]   Yadong Wang
  • [riscv-port] RFR: 8281632: riscv: Improve interpreter stack banging [v5]   Fei Yang
• [riscv-port] Integrated: 8281632: riscv: Improve interpreter stack banging   Yadong Wang
• git: openjdk/riscv-port: riscv-port: 19 new changesets   duke
• git: openjdk/riscv-port: riscv-port: 24 new changesets   duke
  • git: openjdk/riscv-port: riscv-port: 24 new changesets   duke
• [riscv-port] RFR: 8283020: riscv: Fix configure integration   Magnus Ihse Bursie
  • [riscv-port] RFR: 8283020: riscv: Fix configure integration   Fei Yang
  • [riscv-port] RFR: 8283020: riscv: Fix configure integration   Feilong Jiang
  • [riscv-port] Integrated: 8283020: riscv: Fix configure integration   Magnus Ihse Bursie
• git: openjdk/riscv-port: riscv-port: 17 new changesets   duke
• [riscv-port] RFR: 8283364: riscv: Intrinsify countPositives   Feilong Jiang
  • [riscv-port] RFR: 8283364: riscv: Intrinsify countPositives [v2]   Feilong Jiang
    • [riscv-port] RFR: 8283364: riscv: Intrinsify countPositives [v2]   Yanhong Zhu
    • [riscv-port] RFR: 8283364: riscv: Intrinsify countPositives [v2]   Fei Yang
  • [riscv-port] Integrated: 8283364: riscv: Intrinsify countPositives   Feilong Jiang
• git: openjdk/riscv-port: riscv-port: 18 new changesets   duke
• git: openjdk/riscv-port: riscv-port: 20 new changesets   duke
• git: openjdk/riscv-port: riscv-port: 12 new changesets   duke
• RISC-V port is upstreamed !   Yangfei (Felix)
  • 回复：RISC-V port is upstreamed !   Xiaolin Zheng
• Cross compiling devkit?   Thomas Stüfe
  • Cross compiling devkit?   Yangfei (Felix)
    • Cross compiling devkit?   Thomas Stüfe
• Different macro definition between make and make images when cross compiling   Dingli Zhang
  • Different macro definition between make and make images when cross compiling   wangyadong (E)

Last message date: Thu Mar 31 09:52:00 UTC 2022
Archived on: Thu Mar 31 09:52:12 UTC 2022

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